SAPHO

What SAPHO Includes

SAPHO provides an end-to-end environment for processor design: from writing high-level CMM code to compiling, simulating, and visualising the resulting hardware. It bundles four major components — YANC, POLARIS, YAWT, and PRISM — into a single cohesive installer.

The architecture is designed around a custom processor model that students and researchers can modify freely. SAPHO runs identically on Windows and Linux, and the entire compilation pipeline — from source to machine code — executes without any cloud dependency.

The SAPHO Ecosystem

From the Lab to the Classroom

SAPHO is being implemented as the core platform for the DLP (Dispositivos Lógicos Programáveis — Programmable Logic Devices) discipline at UFJF — Universidade Federal de Juiz de Fora. Every student enrolled in this course designs, compiles, and simulates custom processor architectures using SAPHO.

This means NIPSCERN is directly shaping the next generation of hardware engineers graduating from UFJF. SAPHO bridges the gap between theoretical computer architecture concepts and hands-on hardware design experience.

What Students Do with SAPHO

YANC bridges the gap between high-level description and machine execution. It includes cmmcomp (CMM → assembly), asmcomp (assembly → binary/hex), and APP auxiliary tools.

POLARIS is a lightweight native application built with Tauri and Rust. It embeds Monaco Editor (the engine behind VS Code) for code editing, and exposes a flexible API-driven system for integrating new tools and workflows.

YAWT provides interactive inspection of simulation outputs — showing signal timelines, register states, and data flows over clock cycles. Fully integrated into POLARIS, it allows live analysis without switching tools.

PRISM renders processor structure and datapaths as RTL diagrams, making it straightforward to understand and debug the hardware description. Students can visually trace how data moves through their processor design.